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Implement 'agc' reset for SX126x & LR11x0 chip families (#9705)
* Implement 'agc' reset for SX126x chip family There's no actual agc on SX126x chips but you can reset the analog registers by doing a warm sleep & running calibration. * Address PR comments & implement for LR11x0 too * calibrate for configured frequency band * Gate LR11X0_AGC_RESET
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@@ -299,6 +299,38 @@ template <typename T> bool LR11x0Interface<T>::isActivelyReceiving()
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RADIOLIB_LR11X0_IRQ_PREAMBLE_DETECTED);
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}
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#ifdef LR11X0_AGC_RESET
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template <typename T> void LR11x0Interface<T>::resetAGC()
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{
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// Safety: don't reset mid-packet
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if (sendingPacket != NULL || (isReceiving && isActivelyReceiving()))
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return;
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LOG_DEBUG("LR11x0 AGC reset: warm sleep + Calibrate(0x3F)");
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// 1. Warm sleep — powers down the analog frontend, resetting AGC state
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lora.sleep(true, 0);
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// 2. Wake to RC standby for stable calibration
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lora.standby(RADIOLIB_LR11X0_STANDBY_RC, true);
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// 3. Calibrate all blocks (PLL, ADC, image, RC oscillators)
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// calibrate() is protected on LR11x0, so use raw SPI (same as internal implementation)
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uint8_t calData = RADIOLIB_LR11X0_CALIBRATE_ALL;
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module.SPIwriteStream(RADIOLIB_LR11X0_CMD_CALIBRATE, &calData, 1, true, true);
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// 4. Re-calibrate image rejection for actual operating frequency
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// Calibrate(0x3F) defaults to 902-928 MHz which is wrong for other regions.
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lora.calibrateImageRejection(getFreq() - 4.0f, getFreq() + 4.0f);
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// 5. Re-apply RX boosted gain mode
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lora.setRxBoostedGainMode(config.lora.sx126x_rx_boosted_gain);
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// 6. Resume receiving
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startReceive();
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}
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#endif
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template <typename T> bool LR11x0Interface<T>::sleep()
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{
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// \todo Display actual typename of the adapter, not just `LR11x0`
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