mirror of
https://github.com/alexhopeoconnor/firmware.git
synced 2026-10-20 18:31:28 +10:00
Merge remote-tracking branch 'origin/develop'
This commit is contained in:
@@ -6,6 +6,9 @@ custom_mtjson_part =
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platform =
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# renovate: datasource=custom.pio depName=platformio/espressif32 packageName=platformio/platform/espressif32
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platformio/espressif32@6.13.0
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platform_packages =
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# renovate: datasource=custom.pio depName=platformio/tool-mklittlefs packageName=platformio/tool/tool-mklittlefs
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platformio/tool-mklittlefs@^1.203.210628
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extra_scripts =
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${env.extra_scripts}
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@@ -65,12 +65,12 @@
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// Pin mapping:
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// CPS (pin 5) -> SX1262 DIO2: TX/RX path select (automatic via SX126X_DIO2_AS_RF_SWITCH)
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// CSD (pin 4) -> GPIO2: Chip enable (HIGH=on, LOW=shutdown)
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// CTX (pin 6) -> GPIO5: Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=bypass PA, LOW=LNA)
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// CTX (pin 6) -> GPIO5: Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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// VCC0/VCC1 -> Vfem via U3 LDO, controlled by GPIO7
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// KCT8103L FEM: TX/RX path switching is handled by DIO2 -> CPS pin (via SX126X_DIO2_AS_RF_SWITCH)
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#define LORA_KCT8103L_PA_CSD 2 // CSD - KCT8103L chip enable (HIGH=on)
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#define LORA_KCT8103L_PA_CTX 5 // CTX - Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=bypass PA, LOW=LNA)
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#define LORA_KCT8103L_PA_CTX 5 // CTX - Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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#if HAS_TFT
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#define USE_TFTDISPLAY 1
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@@ -13,8 +13,8 @@
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static const uint8_t TX = 43;
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static const uint8_t RX = 44;
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static const uint8_t SDA = 5;
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static const uint8_t SCL = 6;
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static const uint8_t SDA = 6;
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static const uint8_t SCL = 17;
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static const uint8_t SS = 8;
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static const uint8_t MOSI = 10;
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@@ -73,29 +73,22 @@
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#define SX126X_DIO2_AS_RF_SWITCH
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#define SX126X_DIO3_TCXO_VOLTAGE 1.8
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// ---- GC1109 RF FRONT END CONFIGURATION ----
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// The Heltec Wireless Tracker V2 uses a GC1109 FEM chip with integrated PA and LNA
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// RF path: SX1262 -> GC1109 PA -> Pi attenuator -> Antenna
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// Measured net TX gain (non-linear due to PA compression):
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// +11dB at 0-15dBm input (e.g., 10dBm in -> 21dBm out)
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// +10dB at 16-17dBm input
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// +9dB at 18-19dBm input
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// +7dB at 21dBm input (e.g., 21dBm in -> 28dBm out max)
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// Control logic (from GC1109 datasheet):
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// ---- KCT8103L RF FRONT END CONFIGURATION ----
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// The heltec_wireless_tracker_v2 uses a KCT8103L FEM chip with integrated PA and LNA
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// RF path: SX1262 -> Pi attenuator -> KCT8103L PA -> Antenna
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// Control logic (from KCT8103L datasheet):
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// Transmit PA: CSD=1, CTX=1, CPS=1
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// Receive LNA: CSD=1, CTX=0, CPS=X (21dB gain, 1.9dB NF)
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// Receive bypass: CSD=1, CTX=1, CPS=0
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// Shutdown: CSD=0, CTX=X, CPS=X
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// Receive LNA: CSD=1, CTX=0, CPS=X (17dB gain, 2dB NF)
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// Transmit bypass: CSD=1, CTX=1, CPS=0 (~1dB loss, no PA)
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// Transmit PA: CSD=1, CTX=1, CPS=1 (full PA enabled)
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// Pin mapping:
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// CTX (pin 6) -> SX1262 DIO2: TX/RX path select (automatic via SX126X_DIO2_AS_RF_SWITCH)
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// CPS (pin 5) -> SX1262 DIO2: TX/RX path select (automatic via SX126X_DIO2_AS_RF_SWITCH)
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// CSD (pin 4) -> GPIO4: Chip enable (HIGH=on, LOW=shutdown)
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// CPS (pin 5) -> GPIO46: PA mode select (HIGH=full PA, LOW=bypass)
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// CTX (pin 6) -> GPIO5: Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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// VCC0/VCC1 -> Vfem via U3 LDO, controlled by GPIO7
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#define USE_GC1109_PA
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#define LORA_PA_POWER 7 // VFEM_Ctrl - GC1109 LDO power enable
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#define LORA_GC1109_PA_EN 4 // CSD - GC1109 chip enable (HIGH=on)
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#define LORA_GC1109_PA_TX_EN 46 // CPS - GC1109 PA mode (HIGH=full PA, LOW=bypass)
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// KCT8103L FEM: TX/RX path switching is handled by DIO2 -> CPS pin (via SX126X_DIO2_AS_RF_SWITCH)
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// GC1109 FEM: TX/RX path switching is handled by DIO2 -> CTX pin (via SX126X_DIO2_AS_RF_SWITCH)
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// GPIO46 is CPS (PA mode), not TX control - setTransmitEnable() handles it in SX126xInterface.cpp
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// Do NOT use SX126X_TXEN/RXEN as that would cause double-control of GPIO46
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#define USE_KCT8103L_PA
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#define LORA_PA_POWER 7 // VFEM_Ctrl - KCT8103L LDO power enable
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#define LORA_KCT8103L_PA_CSD 4 // CSD - KCT8103L chip enable (HIGH=on)
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#define LORA_KCT8103L_PA_CTX 5 // CTX - Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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@@ -0,0 +1,20 @@
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#ifndef Pins_Arduino_h
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#define Pins_Arduino_h
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#include "soc/soc_caps.h"
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#include <stdint.h>
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#define USB_VID 0x303a // USB JTAG/serial debug unit ID
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#define USB_PID 0x1001 // USB JTAG/serial debug unit ID
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static const uint8_t SS = 5;
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static const uint8_t SDA = 8;
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static const uint8_t SCL = 9;
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static const uint8_t ADC = 10;
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static const uint8_t TXD2 = 13;
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static const uint8_t MOSI = 14;
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static const uint8_t RXD2 = 15;
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static const uint8_t MISO = 39;
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static const uint8_t SCK = 40;
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#endif
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@@ -0,0 +1,25 @@
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; M5stack Cardputer Advanced
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[env:m5stack-cardputer-adv]
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extends = esp32s3_base
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board = m5stack-stamps3
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board_check = true
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board_build.partitions = default_8MB.csv
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upload_protocol = esptool
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build_flags =
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${esp32s3_base.build_flags}
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-D M5STACK_CARDPUTER_ADV
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-D BOARD_HAS_PSRAM
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-D ARDUINO_USB_CDC_ON_BOOT=1
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-I variants/esp32s3/m5stack_cardputer_adv
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lib_deps =
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${esp32s3_base.lib_deps}
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# renovate: datasource=git-refs depName=meshtastic-st7789 packageName=https://github.com/meshtastic/st7789 gitBranch=main
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https://github.com/meshtastic/st7789/archive/9ee76d6b18b9a8f45a2c5cae06b1134a587691eb.zip
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# # renovate: datasource=github-tags depName=pschatzmann_arduino-audio-driver packageName=pschatzmann/arduino-audio-driver
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# https://github.com/pschatzmann/arduino-audio-driver/archive/v0.2.1.zip
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# renovate: datasource=custom.pio depName=ESP8266Audio packageName=earlephilhower/library/ESP8266Audio
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earlephilhower/ESP8266Audio@1.9.9
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# renovate: datasource=custom.pio depName=ESP8266SAM packageName=earlephilhower/library/ESP8266SAM
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earlephilhower/ESP8266SAM@1.1.0
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# renovate: datasource=custom.pio depName=NeoPixel packageName=adafruit/library/Adafruit NeoPixel
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adafruit/Adafruit NeoPixel@1.15.2
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@@ -0,0 +1,90 @@
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#define USE_ST7789
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#define ST7789_NSS 37
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#define ST7789_RS 34 // DC
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#define ST7789_SDA 35 // MOSI
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#define ST7789_SCK 36
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#define ST7789_RESET 33
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#define ST7789_MISO -1
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#define ST7789_BUSY -1
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// #define VTFT_CTRL 38
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#define VTFT_LEDA 38
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// #define ST7789_BL (32+6)
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#define ST7789_SPI_HOST SPI2_HOST
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// #define TFT_BL (32+6)
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#define SPI_FREQUENCY 40000000
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#define SPI_READ_FREQUENCY 16000000
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#define TFT_HEIGHT 135
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#define TFT_WIDTH 240
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#define TFT_OFFSET_X 0
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#define TFT_OFFSET_Y 0
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#define HAS_PHYSICAL_KEYBOARD 1
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// Backlight is controlled to power rail on this board, this also powers the neopixel
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// #define PIN_POWER_EN 38
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#define BUTTON_PIN 0
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#define I2C_SDA 8
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#define I2C_SCL 9
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#define I2C_SDA1 2
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#define I2C_SCL1 1
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#undef LORA_SCK
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#undef LORA_MISO
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#undef LORA_MOSI
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#undef LORA_CS
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#define LORA_SCK 40
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#define LORA_MISO 39
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#define LORA_MOSI 14
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#define LORA_CS 5 // NSS
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#define USE_SX1262
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#define LORA_DIO0 -1
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#define LORA_RESET 3
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#define LORA_RST 3
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#define LORA_DIO1 4
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#define LORA_DIO2 6
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#define LORA_DIO3 RADIOLIB_NC
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#define SX126X_CS LORA_CS
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#define SX126X_DIO1 LORA_DIO1
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#define SX126X_BUSY LORA_DIO2
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#define SX126X_RESET LORA_RESET
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#define SX126X_DIO2_AS_RF_SWITCH
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#define SX126X_DIO3_TCXO_VOLTAGE 1.8
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#define TCXO_OPTIONAL
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#undef GPS_RX_PIN
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#undef GPS_TX_PIN
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#define GPS_RX_PIN 15
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#define GPS_TX_PIN 13
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#define HAS_GPS 1
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#define GPS_BAUDRATE 115200
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// audio codec ES8311
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#define HAS_I2S
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#define DAC_I2S_BCK 41
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#define DAC_I2S_WS 43
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#define DAC_I2S_DOUT 42
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#define DAC_I2S_DIN 46
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#define DAC_I2S_MCLK 45 // dummy
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// TCA8418 keyboard
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#define I2C_NO_RESCAN
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#define KB_INT 11
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#define HAS_NEOPIXEL
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#define NEOPIXEL_COUNT 1
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#define NEOPIXEL_DATA 21
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#define NEOPIXEL_TYPE (NEO_GRB + NEO_KHZ800)
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#define BATTERY_PIN 10 // A battery voltage measurement pin, voltage divider connected here to measure battery voltage
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#define ADC_CHANNEL ADC1_GPIO10_CHANNEL
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#define ADC_MULTIPLIER 2 * 1.02 // 100k + 100k, and add 2% to kick the voltage over the max voltage to show charging.
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// BMI270 6-axis IMU on internal I2C bus
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#define HAS_BMI270
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@@ -53,7 +53,7 @@ Making your own node based on this design is straightforward. There are various
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The E80 from CDEbyte is the most obtainable module at present, and has been selected as the default option.
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Naturally, CDEbyte have chosen to ignore the generic Semtech impelementation of the RF switching logic and have supplied confusing and contradictory documentation, which is explained below.
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Naturally, CDEbyte have chosen to ignore the generic Semtech implementation of the RF switching logic and have supplied confusing and contradictory documentation, which is explained below.
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tl;dr: The E80 is chosen as the default. **If you wish to use another module, the table in `rfswitch.h` must be adjusted accordingly.**
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@@ -116,7 +116,7 @@ _(none)_
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1. Double press the XIAO nrf52840's `reset` button to put it in bootloader mode, and a USB volume named `XIAO SENSE` will appear
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2. Copy the `firmware.uf2` file to the `XIAO SENSE` volume (refer to the last step of [Build Meshtastic](#2-build-meshtastic))
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3. The XIAO nrf52840's red LED will flash for several seconds as the firmware is copied
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4. Once Meshtastic firmware succesfully boots, the:
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4. Once Meshtastic firmware successfully boots, the:
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1. Green LED will turn on
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2. Red LED will flash several times to indicate flash memory writes during initial settings file creation
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3. Green LED will blink every second once the firmware is running normally
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@@ -135,7 +135,7 @@ _(none)_
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- If you don't see any specific error message, but the boot process is stuck or not proceeding as expected, this might also mean there is a conflict in `variant.h`. If you have made any changes to the pin mapping, ensure they do not result in a conflict. If all else fails, try reverting your changes and using the known-good configuration included here.
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- The above might also mean something is wired incorrectly. Try reverting to one of the known-good example wirings in section 4.
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- If the E22 gets hot to the touch:
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- The power amplifier is likely running continually. Disconnect it and the XIAO from power immediately, and double check wiring and pin mapping. In my experimentation this occurred in cases where TXEN was inadvertenly high (usually due to a pin mapping conflict).
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- The power amplifier is likely running continually. Disconnect it and the XIAO from power immediately, and double check wiring and pin mapping. In my experimentation this occurred in cases where TXEN was inadvertently high (usually due to a pin mapping conflict).
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## 5. Notes
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@@ -38,6 +38,9 @@ void initVariant()
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pinMode(PIN_3V3_ACC_EN, OUTPUT);
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digitalWrite(PIN_3V3_ACC_EN, HIGH);
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pinMode(T1000X_SENSOR_EN_PIN, OUTPUT);
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digitalWrite(T1000X_SENSOR_EN_PIN, HIGH);
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pinMode(BUZZER_EN_PIN, OUTPUT);
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digitalWrite(BUZZER_EN_PIN, HIGH);
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@@ -126,7 +126,7 @@ extern "C" {
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#define BATTERY_PIN 2 // P0.02/AIN0, BAT_ADC
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#define BATTERY_IMMUTABLE
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#define ADC_MULTIPLIER (2.0F)
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// P0.04/AIN2 is VCC_ADC, P0.05/AIN3 is CHARGER_DET, P1.03 is CHARGE_STA, P1.04 is CHARGE_DONE
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// P0.04 is sensor power enable, P0.05/AIN3 is CHARGER_DET, P1.03 is CHARGE_STA, P1.04 is CHARGE_DONE
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#define EXT_CHRG_DETECT (32 + 3) // P1.03
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#define EXT_CHRG_DETECT_VALUE LOW
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@@ -148,9 +148,9 @@ extern "C" {
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#define PIN_BUZZER (0 + 25) // P0.25, pwm output
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#define T1000X_SENSOR_EN
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#define T1000X_VCC_PIN (0 + 4) // P0.4
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#define T1000X_NTC_PIN (0 + 31) // P0.31/AIN7
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#define T1000X_LUX_PIN (0 + 29) // P0.29/AIN5
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#define T1000X_SENSOR_EN_PIN (0 + 4) // P0.4, Power to Sensor (GPIO, not ADC)
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#define T1000X_NTC_PIN (0 + 31) // P0.31/AIN7
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#define T1000X_LUX_PIN (0 + 29) // P0.29/AIN5
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#define HAS_SCREEN 0
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@@ -38,6 +38,9 @@ void initVariant()
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pinMode(PIN_3V3_ACC_EN, OUTPUT);
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digitalWrite(PIN_3V3_ACC_EN, LOW);
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pinMode(T1000X_SENSOR_EN_PIN, OUTPUT);
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digitalWrite(T1000X_SENSOR_EN_PIN, HIGH);
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pinMode(BUZZER_EN_PIN, OUTPUT);
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digitalWrite(BUZZER_EN_PIN, HIGH);
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@@ -143,9 +143,9 @@ extern "C" {
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#define PIN_BUZZER (0 + 25) // P0.25, pwm output
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#define T1000X_SENSOR_EN
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#define T1000X_VCC_PIN (0 + 4) // P0.4
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#define T1000X_NTC_PIN (0 + 31) // P0.31
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#define T1000X_LUX_PIN (0 + 29) // P0.29
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#define T1000X_SENSOR_EN_PIN (0 + 4) // P0.4, Power to Sensor (GPIO, not ADC)
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#define T1000X_NTC_PIN (0 + 31) // P0.31
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#define T1000X_LUX_PIN (0 + 29) // P0.29
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#ifdef __cplusplus
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}
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Reference in New Issue
Block a user